{"id":164,"date":"2020-07-15T18:55:47","date_gmt":"2020-07-15T22:55:47","guid":{"rendered":"https:\/\/web.uri.edu\/hpcl\/?page_id=164"},"modified":"2024-04-20T10:04:45","modified_gmt":"2024-04-20T14:04:45","slug":"partial-list-of-published-papers","status":"publish","type":"page","link":"https:\/\/web.uri.edu\/hpcl\/partial-list-of-published-papers\/","title":{"rendered":"Partial List of Published Papers"},"content":{"rendered":"\n<hr class=\"wp-block-separator\" \/>\n\n\n\n<h2 class=\"wp-block-heading\">2024<\/h2>\n\n\n\n<ol class=\"wp-block-list\" type=\"1\"><li>\u201cAn FPGA-Enabled Framework for Rapid Automated Design of Photonic Integrated Circuits\u201d, <em>In Proceedings of the 2024 ACM\/SIGDA International Symposium on Field Programmable Gate Arrays<\/em> (<strong>FPGA &#8217;24<\/strong>). (Zhenyu Xu, Miaoxiang Yu, Jillian Cai, Saddam Gafsi, Judson Douglas Ryckman, Qing Yang, and Tao Wei).<\/li><li>\u201c<a href=\"http:\/\/www.conf-icnc.org\/2024\/papers\/p291-karakus.pdf\" target=\"_blank\" rel=\"noreferrer noopener\">Machine Learning in Sensors for Collision Avoidance<\/a>\u201d,&nbsp;(Erkan Karakus, Tao Wei and Qing Yang), in <em>Proceedings of International Conference on Computing, Networking and Communications <\/em>(ICNC 2024) pp. 291-295<\/li><\/ol>\n\n\n\n<h2 class=\"wp-block-heading\">2023<\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li>\u201cA Novel FPGA Simulator Accelerating Reinforcement Learning-Based Design of Power Converters\u201d. <em>Proceedings of the 2023 ACM\/SIGDA International Symposium on Field Programmable Gate Arrays<\/em>. (Zhenyu Xu, Miaoxiang Yu, Qing Yang, Yeonho Jeong, Tao Wei)<\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>2022<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li>\u201cA Novel FPGA-Based Circuit Simulator for Accelerating Reinforcement Learning-Based Design of Power Converters\u201d. <em>34th IEEE International Conference on Application-specific Systems, Architectures and Processors<\/em>.. Porto, Portugal. (Zhenyu Xu, Miaoxiang Yu, Qing Yang, Yeonho Jeong, Jillian Cai and Tao Wei)<\/li><li>\u201cA Novel Interconnection Architecture for Secured Die-to-Die Communication in System-in-Package. <em>2022 IEEE International Conference on Networking, Architecture and Storage<\/em> (NAS). (Zhenyu Xu, Qing Yang, Tao Wei)<\/li><li>\u201cHighly Scalable Runtime Countermeasure Against Microprobing Attacks on Die-to-Die Interconnections in System-in-Package\u201d, <em>Proceedings of the 2022 ACM\/SIGDA International Symposium on Field-Programmable Gate Arrays<\/em>. (Zhenyu Xu, Thomas Mauldin, Qing Yang, Tao Wei)<\/li><li>\u201cA Novel Interconnection Architecture for Secured Die-to-Die Communication in System-in-Package\u201d<\/li><li>Zhenyu Xu, Tao Wei and Qing Yang, <em>16<sup>th<\/sup> IEEE International Conference on Networking, Architecture and Storage, <\/em>Oct 3-4, 2022, Philadelphia, USA.<\/li><li>\u201cIn-Sensor Neural Network Preprocessing for ADAS Computer Systems\u201d , Mark Bruckner, Erkan Karakus, Tao Wei and Qing Yang, <em>16<sup>th<\/sup> IEEE International Conference on Networking, Architecture and Storage,<\/em> 2022, Philadelphia, USA.<\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\">2020&nbsp;<\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li><a href=\"https:\/\/conferences.computer.org\/isca\/pdfs\/ISCA2020-4QlDegUf3fKiwUXfV0KdCm\/466100a749\/466100a749.pdf\">&#8220;A bus authentication and anti-probing architecture extending hardware trusted computing base off CPU chip and beyond&#8221;, <\/a>Z. Xu, T. Mauldin, Z. Yao, S. Pei, T. Wei, and Qing Yang, ACM\/IEEE International Symposium on Computer Architecture (ISCA 2020), May 30-June 3, 2020.<\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>2019<\/strong>&nbsp;<\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li><a href=\"https:\/\/dl.acm.org\/doi\/abs\/10.1145\/3310149?preflayout=flat\">&#8220;REGISTOR: A Platform for Unstructured Data Processing Inside SSD Storage&#8221;, <\/a>Shuyi Pei, Jing Yang and Qing Yang, ACM Transaction on Storage, Vol. 15, No. 1, April 2019.&nbsp;<\/li><\/ul>\n\n\n\n<ul class=\"wp-block-list\"><li><a href=\"https:\/\/dl.acm.org\/doi\/10.1145\/3319647.3325840\">&#8220;WARCIP: write amplification reduction by clustering I\/O pages&#8221;, <\/a>Jing Yang, Shuyi Pei, and Qing Yang, in Proceedings of the 12th ACM International Conference on Systems and Storage (SYSTOR &#8217;19). 2019, ACM, New York, NY, USA.<\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\">2018<\/h2>\n\n\n\n<div class=\"wp-block-columns is-layout-flex wp-container-core-columns-is-layout-9d6595d7 wp-block-columns-is-layout-flex\">\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\" style=\"flex-basis:66.66%\">\n<ul class=\"wp-block-list\"><li>&#8220;<a href=\"https:\/\/www.systor.org\/2018\/pdf\/systor18-42.pdf\">REGISTOR: A Platform for Unstructured Data Processing Inside SSD Storage&#8221;,<\/a> Shuyi Pei, Jing Yang and Qing Yang, The 11th ACM International Systems and Storage Conference (SYSTOR2018), Haifa, Israel, June 4-6, 2018.&nbsp;<\/li><\/ul>\n\n\n\n<ul class=\"wp-block-list\"><li><a href=\"https:\/\/ieeexplore.ieee.org\/document\/8452032\">&#8220;CISC: Coordinating Intelligent SSD and CPU to Speedup Graph Processing&#8221;,<\/a> Dongyang Li1, Yafei Yang, Weijun Li and Qing Yang1, 2018 17th International Symposium on Parallel and Distributed Computing (ISPDC), Geneva, Switzerland, June 25-28.<\/li><\/ul>\n\n\n\n<ul class=\"wp-block-list\"><li>&#8220;<a href=\"Hardware Object Deserialization inside SSD Storage&quot;,\">HODS: Hardware Object Deserialization inside SSD Storage&#8221;, <\/a>Dongyang Li, Fei Wu, Yang Weng, Qing Yang, and Changsheng Xie, The 26th IEEE International Symposium on Field-Programmable Custom Computing Machines April 29 &#8211; May 1, Boulder, CO, USA<\/li><\/ul>\n\n\n\n<p><\/p>\n<\/div>\n<\/div>\n\n\n\n<h2 class=\"wp-block-heading\">2017&nbsp;<\/h2>\n\n\n\n<div class=\"wp-block-columns is-layout-flex wp-container-core-columns-is-layout-9d6595d7 wp-block-columns-is-layout-flex\">\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\" style=\"flex-basis:66.66%\">\n<ul class=\"wp-block-list\"><li><a href=\"https:\/\/dl.acm.org\/doi\/10.1145\/3046683\">&#8220;WCET-Aware Dynamic I-Cache Locking for a Single Task&#8221;,<\/a> Wenguang Zheng, Hui Wu, and Qing Yang, ACM Trans. Archit. Code Optim. 14, 1, Article 4 (March 2017), 26 pages. DOI: https:\/\/doi.org\/10.1145\/3046683<\/li><li><a href=\"https:\/\/ieeexplore.ieee.org\/ielaam\/9424\/8059716\/7874167-aam.pdf\">&#8220;Incorporating Intelligence in Fog Computing for Big Data Analysis in Smart Cities&#8221;<\/a> Bo Tang, Zhen Chen , Gerald Hefferman , Shuyi Pei , Tao Wei , Haibo He , Qing Yang IEEE Transactions on Industrial Informatics ( Volume: 13, Issue: 5, Oct. 2017 ) Page(s): 2140 &#8211; 2150, 08 March 2017<\/li><\/ul>\n<\/div>\n<\/div>\n\n\n\n<h2 class=\"wp-block-heading\">2015&nbsp;<\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li><a href=\"https:\/\/ieeexplore.ieee.org\/document\/7349591\">&#8220;Reflex-Tree: A Biologically Inspired Parallel Architecture for Future Smart Cities&#8221;, Jason Kane, Bo Tang,<\/a> Zhen Chen, Jun Yan, Tao Wei, Haibo He and Qing Yang, The 44th Annual Conference, International Conference on Parallel Processing, Sept. 1-4, 2015.<\/li><li><a href=\"https:\/\/core.ac.uk\/download\/pdf\/212940795.pdf\">&#8220;Fog Data: Enhancing Telehealth Big Data Through Fog Computing&#8221;, Harishchandra Dubey, Jing Yang<\/a>, Nick Constant, Amir Mohammad Amiri, Qing Yang, Kunal Makodiya, Int&#8217;l Conference on BigData, Kaohsiung Taiwan, Oct 2015.&nbsp;<\/li><li><a href=\"https:\/\/ieeexplore.ieee.org\/document\/7160083\">&#8220;A Reconfigurable Multiclass Support Vector Machine Architecture for Real-Time Embedded Systems Classification&#8221;, Jason Kane, Robert Hernandez, and Qing Yang, <\/a>The 23rd IEEE International Symposium on Field-Programmable Custom Computing Machines, May 3-5, 2015, Vancouver, British Columbia, Canada.<\/li><li><a href=\"https:\/\/ieeexplore.ieee.org\/document\/7160072\">&#8220;A Parallel and Pipelined Architecture for Accelerating Fingerprint Computation in High Throughput Data Storages &#8220;<\/a>, Dongyang Li, Qing Yang, Qingbo Wang, Cyril Guyot, Ashwin Narasimha, Dejan Vucinic, Zvonimir Bandic, The 23rd IEEE International Symposium on Field-Programmable Custom Computing Machines, May 3-5, 2015, Vancouver, British Columbia, Canada.<\/li><li><a href=\"https:\/\/ieeexplore.ieee.org\/document\/7152474\">&#8220;F\/M-CIP: Implementing Flash Memory Cache Using Conservative Insertion and Promotion&#8221;, Jing Yang and Qing Yang, <\/a>Published in: 2015 15th IEEE\/ACM International Symposium on Cluster, Cloud and Grid Computing (CCGrid), May 4-7 2015.<\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\">2014&nbsp;<\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li>Jiguang Wan, Jibin Wang, Changsheng Xie, Qing Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/2013\/S2RAID-TPDS.pdf\">&#8220;S^2-RAID: Parallel RAID Architecture for Fast Data Recovery,&#8221;&nbsp;<\/a>IEEE Transactions on Parallel and Distributed Systems, vol. 25, no. 6, pp. 1638-1647, June 2014. IEEE computer Society Digital Library. IEEE Computer Society,&nbsp;<\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>2013&nbsp;<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li>Hernandez, Robert; Yang, Qing; Huang, He; Zhang, Fan; and Zhang, Xiaorong <a href=\"https:\/\/ieeexplore.ieee.org\/abstract\/document\/6610901\">&#8220;Design and Implementation of a Low Power Mobile CPU Based Embedded System for Artificial Leg Control&#8221;<\/a>, 35th Annual International IEEE EMBS Conference, July 3-7, 2013, Osaka, Japan.<\/li><li>Jeffrey Carvell, Ruihua Cheng, and Qing Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/2013\/RuihuaCheng.pdf\">&#8220;INDUCED MAGNETO-ELECTRIC COUPLING AT FERROELECTRIC\/FERROMAGNETIC INTERFACE&#8221;&nbsp;<\/a>Journal of Applided Physics, 113, 17C715 (2013). http:\/\/dx.doi.org\/10.1063\/1.4794873<\/li><li>Jing Yang and Qing Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/2013\/nas.pdf\">&#8220;A New Metadata Update Method for Fast Recovery of SSD Cache,&#8221;&nbsp;<\/a>The 8th IEEE International Conference on Networking, Architecture, and Storage (NAS 2013), July, 2013, Xi&#8217;an, China.<\/li><li>Xiaorong Zhang, He Huang, and Qing Yang, <a href=\"https:\/\/ieeexplore.ieee.org\/document\/6610901\">&#8220;Real-Time Implementation of a Self-Recovery EMG Pattern Recognition Interface for Artificial Arms,&#8221;<\/a> 35th Annual International IEEE EMBS Conference, July 3-7, 2013, Osaka, Japan.<\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>2012&nbsp;<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li>Jason Kane and Qing Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/2012\/SBAC.pdf\">&#8220;Compression Speed Enhancements to Lepel-Ziv-Oberhumer for Multi-Core Systems,&#8221;&nbsp;<\/a>24th International Symposium on Computer Architecture and High Performance Computing, October 24-26, 2012.<\/li><li>Jing Yang, Qiang Cao, Xu Li, Changsheng Xie, and Qing Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/2012\/ST-CDP.pdf\">&#8220;ST-CDP: Snapshots in TRAP for Continuous Data Protection&#8221;,&nbsp;<\/a>IEEE Transaction on Computers, vol. 61, Number 6, June 2012, pp. 753-766.<\/li><li>Xiaorong Zhang, He Huang, and Qing Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/linc\">&#8220;Implementing an FPGA system for real-time intent recognition for prosthetic legs,&#8221;&nbsp;<\/a>In Proceedings of the 49th Annual Design Automation Conference (DAC &#8217;12). ACM, New York, NY, USA, 169-175. DOI=10.1145\/2228360.2228394 http:\/\/doi.acm.org\/10.1145\/2228360.2228394&nbsp;<\/li><li>Xiaorong Zhang, Yuhong Liu, Fan Zhang, Jin Ren, Yan (Lindsay) Sun, Qing Yang, and He Huang,&nbsp;<a href=\"http:\/\/www.ele.uri.edu\/linc\/Publications\/2012\/On%20Design%20and%20Implementation%20of%20Neural-Machine.pdf\">&#8220;On Design and Implementation of Neural- Machine Interface for Artificial Legs&#8221;,&nbsp;<\/a>IEEE Transactions on Industrial Informatics, Volume: 8, Issue 2, (2012), pp. 418-429.<\/li><li>Xiaorong Zhang, Ding Wang, Qing Yang, and He Huang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/linc\">&#8220;An Automatic and User-Driven Training Method for Locomotion Mode Recognition for Artificial Leg Control&#8221;,&nbsp;<\/a>Conf Proc IEEE Eng Med Biol Soc, (2012).&nbsp;<\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>2011<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li>&nbsp;Jin Ren and Qing Yang&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/HPCA\/ICASH.pdf\">&#8220;I-CASH: Intelligently Coupled Array of SSD and HDD&#8221;&nbsp;<\/a>in The 17th IEEE International Symposium on High Performance Computer Architecture, 2011 (HPCA&#8217;11), San Antonio, TX, Feb 2011.<\/li><li>X. Zhang, H. Huang, and Q. Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/linc\">&#8220;A special purpose embedded system for neural machine interface for artificial legs&#8221;&nbsp;<\/a>Conf Proc IEEE Eng Med Biol Soc. 2011;2011:5207-10.<\/li><li>Fan Zhang, Will DiSanto, Jin Ren, Zhi Dou, Qing Yang, and He Huang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/linc\">&#8220;A Novel CPS System for Evaluating a Neural-Machine Interface for Artificial Legs&#8221;&nbsp;<\/a>ACM\/IEEE Second International Conference on Cyber-Physical Systems, Chicago, April 12 &#8211; 14, 2011.<\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>2010&nbsp;<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li><strong>J<\/strong>in Ren and Qing Yang&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/2010\/ICDCS10.pdf\">A New Buffer Cache Design Exploiting both Temporal and Content Localities&nbsp;<\/a><em>The 30th International Conference on Distributed Computing Systems, ICDCS 2010.&nbsp;<\/em>Genoa, Italy, June 21-25, 2010.<\/li><li>Jiguang Wan, Jibin Wang, Qing Yang, and Changsheng Xie,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/2010\/MSST10.pdf\">&#8220;S2-RAID: A New RAID Architecture for Fast Data Recovery&#8221;&nbsp;<\/a><em>Proceedings of 26th IEEE Symposium on Massive Storage Systems and Technologies,&nbsp;<\/em>Lake Tahoe, Incline Village, Nevada, May 3-7, 2010<\/li><li>He Huang, Yan (Lindsay) Sun, Qing Yang, Fan Zhang, Xiaorong Zhang, Yuhong Liu, Jin Ren, Fabian Sierra.&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/2010\/CPS10.pdf\">&#8220;Integrating Neuromuscular and Cyber Systems for Neural Control of Artificial Legs&#8221;&nbsp;<\/a><em>ACM\/IEEE International Conference on Cyber-Physical Systems&nbsp;<\/em>Stockholm, Sweden. April, 2010.<\/li><li>Qing Yang&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/2010\/EHR.pdf\">&#8220;Secure and Efficient Data Replay in Distributed eHealthcare Information System,&#8221;&nbsp;<\/a><em>International Conference on Information Society (i-Society 2010)&nbsp;<\/em>June 28-30, 2010, London, UK.<\/li><li>X. Zhang, H. Huang, and Q. Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/linc\">&#8220;Design and implementation of a special purpose embedded system for neural machine interface,&#8221;&nbsp;<\/a>2010 IEEE International Conference on Computer Design (ICCD), pp 166-172, Oct. 3-6, 2010.&nbsp;<\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>2009<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li><strong>&nbsp;Yang, Y., Sun, Y. L., Kay, S., and Yang, Q. 2009. Defending online reputation systems against colla<\/strong>borative unfair raters through signal modeling and trust. In&nbsp;<em>Proceedings of the 2009 ACM Symposium on Applied Computing (Honolulu, Hawaii). SAC &#8217;09.&nbsp;<\/em>ACM, New York, NY, 1308-1315. DOI= http:\/\/doi.acm.org\/10.1145\/1529282.1529575&nbsp;<\/li><li>Weijun Xiao and Qing Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/2009\/Case.pdf\">&#8220;A Case for Continuous Data Protection at Block Level in Disk Array Storages&#8221;&nbsp;<\/a><em>&#8221; IEEE Transactions on Parallel and Distributed Systems, Volume 20, Issue 6 (June 2009), Pages 898-911.<\/em><\/li><li>Weijun Xiao, Qing Yang, J. Ren, C. Xie, and H. Li,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/2009\/Snapshot.pdf\">&#8220;Design and Analysis of Block Level Snapshots for Data Protection and Recovery&#8221;&nbsp;<\/a><em>IEEE Trans. Comput. 58, 12 (Dec. 2009), 1615-1625. DOI= http:\/\/dx.doi.org\/10.1109\/TC.2009.107&nbsp;<\/em><\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>2008&nbsp;<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li>Weijun Xiao and Qing Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/2008\/Camera_RdyFinal.pdf\">&#8220;Can We Really Recover Data If Storage Subsystem Fails?&#8221;&nbsp;<\/a><em>Proceedings of IEEE International Conference on Distributed Computer Systems,&#8221;&nbsp;<\/em>June, 2008.<\/li><li>X. Li, C. Xie, and Qing Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/2008\/NAS08_CameraReady_LiXieYang.pdf\">&#8220;Optimal Implementation of Continuous Data Protection (CDP) in Linux Kernel,&#8221;&nbsp;<\/a>in&nbsp;<em>Proc. Of IEEE Int.l Conference on Network, Architecture, and Storages,<\/em>&nbsp;June, 2008<strong>.<\/strong><\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>2007&nbsp;<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li><strong>Y. <\/strong>Yang, Y. Sun, J. Ren, and Q. Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/2008\/TRAM.pdf\">&#8220;Building trust in onling rating systems through signal modeling.&#8221;&nbsp;<\/a><em>Proc. of International Workshop on Trust and Reputation Management in Massively Distributed Computing Systems,&nbsp;<\/em>June 25-29, 2007, in conjunction with ICDCS 2007,Toronto Canada.<\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>2006&nbsp;<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li><strong>Qi<\/strong>ng Yang, Weijun Xiao, and Jin Ren,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/2006\/TRAP.pdf\">&#8220;TRAP-Array: A Disk Array Architecture Providing Timely Recovery to Any Point-in-time&#8221;&nbsp;<\/a>in&nbsp;<em>Proc. of The 33rd Annual International Symposium on Computer Architecture, 2006 (ISCA&#8217;06)<\/em><\/li><li>Qing Yang, Weijun Xiao, and Jin Ren,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/2006\/PRINS.pdf\">&#8220;PRINS: Optimizing Performance of Reliable Internet Storages&#8221;&nbsp;<\/a><em>The 26th International Conference on Distributed Computing Systems,&nbsp;<\/em>Lisbon, Portugal, 2006. (ICDCS&#8217;06)<\/li><li>W. Xiao, Y. Liu, Qing Yang, J. Ren, and C. Xie.&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/2006\/MSST.pdf\">&#8220;Implementation and Performance Evaluation of Two Snapshot Methods on iSCSI Target Storages&#8221;&nbsp;&nbsp;<\/a>in&nbsp;<em>Proceedings of NASA\/IEEE 14th Conf. on Mass Storage Systems and Technologies,<\/em>&nbsp;May 2006<\/li><li>Qing Yang&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/2006\/AINA.pdf\">&#8220;On Performance of Parallel iSCSI Protocol for Networked Storage Systems&#8221;&nbsp;<\/a>in&nbsp;<em>Proceedings of IEEE Int&#8217;l Conf on Advanced Information Networking and Applications<\/em>Vienna, Austria, April 2006.<\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>2005&nbsp;<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li>Xubin He, Ming Zhang, and Qing Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/mingz\/IEEETPSCnspekj.pdf\">&#8220;SPEK: A storage performance evaluation kernel module for block level storage systems under faulty conditions&#8221;&nbsp;<\/a><em>IEEE Transaction on Dependable and Secure Computing&nbsp;<\/em>, Vol. 2, No. 2, April-June 2005, pp. 138-149.<\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>2004&nbsp;<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li>Ming Zhang and Qing Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/mingz\/ICPPbucs.pdf\">&#8220;BUCS &#8211; A Bottom-Up Cache Structure for Networked Storage Servers&#8221;,&nbsp;<\/a>Proc. of International Conference on Parallel Processing., Montreal, Canada, Aug, 2004, pp.310-317.<\/li><li>Ming Zhang, Yinan Liu, and Qing Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/mingz\/MSST04_Yang.pdf\">&#8220;Cost-Effective Remote Mirroring Using the iSCSI Protocol&#8221;,&nbsp;<\/a>21st IEEE Conference on Mass Storage Systems and Technologies, April, 2004, pp.385-398.<\/li><li>Xubin He, Ming Zhang, and Qing Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/STICS\/JPDCArticle.pdf\">&#8220;STICS: SCSI-To-IP Cache for Storage Area Networks&#8221;,&nbsp;<\/a><em>Journal of Parallel and Distributed Computing&nbsp;<\/em>, vol. 64, No. 9, pp. 1069-1085, September 2004.<\/li><li>Xubin He and Qing Yang&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/DRALIC\/JPDC.pdf\">&#8220;Performance Evaluation of Distributed Web Server Architectures under E-Commerce Workloads&#8221;&nbsp;<\/a>Submitted to Journal of Parallel and Distributed Computing.<\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>2003&nbsp;<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li>Ming Zhang, Qing Yang, and Xubin He,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/mingz\/IEEETPSCnspekj.pdf\">&#8220;SPEK: A Storage Performance Evaluation Kernel Module for Block Level Storage Systems&#8221;,&nbsp;<\/a>Proc. Of MASCOTS 2003, Oct 2003.<\/li><\/ul>\n\n\n\n<ul class=\"wp-block-list\"><li>Ming Zhang and Qing Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/STICS\/iscsiavail.pdf\">&#8220;Evaluating Availability of Networked Storages Using Commercial Workload&#8221;,&nbsp;<\/a>presented at&nbsp;<a href=\"http:\/\/tesla.hpl.hp.com\/caecw03\/\">Sixth Workshop on Computer Architecture Evaluation using Commercial Workloads (CAECW),&nbsp;<\/a>Feb, 2003.&nbsp;<\/li><li>Ming Zhang and Qing Yang, &#8220;N-SPEK: A Performability Benchmark Tool for Networked Storage Systems&#8221;,&nbsp;<a href=\"http:\/\/ccgrid2003.apgrid.org\/program.html\">Workshop on Parallel I\/O in Cluster Computing and Computational Grids.,&nbsp;<\/a>12-15 May 2003, Toshi Center Hotel, Tokyo, JAPAN&nbsp;<\/li><li>Ming Zhang and Xubin He, &#8220;A Unified, Low-overhead Framework to Support Continuous Profiling and Optimization&#8221;, in Proceedings of 22nd IEEE International Performance Computing and Communications Conference (IPCCC\ufffd2003), Phoenix, Arizona, April 2003.&nbsp;<\/li><li>Scott Lloyd, Qing Yang, Joan Peckham, and Jian Li, &#8220;RORIB, An economic and efficient solution for Real-time, Online, Remote Informa tion Backup,&#8221; Journal of Database Management, JDM S00-294, Vol. 14, No. 3, July-Sept. 2003, pp. 56-73.<\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>2002&nbsp;<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li><strong>Xubi<\/strong>n He, Qing Yang, and Ming Zhang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/STICS\/iCache.pdf\">&#8220;A Caching Strategy to Improve iSCSI Performance,&#8221;&nbsp;<\/a>in Proc. of IEEE Annual Conference on Local Computer Networks, Nov. 6-8,2002.<\/li><li>Xubin He, Qing Yang, and Ming Zhang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/STICS\/icpp02.pdf\">&#8220;Introducing SCSI-To-IP Cache for Storage Area Networks&#8221;,&nbsp;<\/a>IEEE International conference on Parallel Processing (ICPP&#8217;2002), August 2002, pp. 203-210.<\/li><li>Xubin He and Qing Yang&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/DRALIC\/VCRAID.pdf\">&#8220;On Design and Implementation of a Large Virtual NVRAM Cache for Software RAID&#8221;,&nbsp;<\/a>in Special Issue of Calculateurs Parallel Journal on Parallel I\/O for Cluster Computing, 2002 spring.<\/li><li>Y. Hu, T. Nightingale and Q. Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/RAPID\/RAPID.html\">&#8220;RAPID-Cache &#8212; A Reliable and Inexpensive Write Cache for High Performance Storage Systems&#8221;,&nbsp;<\/a>IEEE Transactions on Parallel and Distributed Systems, Vol. 13, No. 3. March 2002, pp.290-307.<\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>2001&nbsp;<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li>Xubin He, Ming Zhang, and Qing Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/DRALIC\/dralic.pdf\">&#8220;DRALIC: A Peer-to-Peer Storage Architecture&#8221;&nbsp;<\/a>Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA&#8217;2001), Volume II, June 2001, pp. 908-913.&nbsp;<\/li><li>Xubin He and Qing Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/DRALIC\/HomePages.pdf\">&#8220;Characterizing the Home Pages&#8221;&nbsp;<\/a>Proceedings of the 2nd International Conference on Internet Computing (IC?2001), June 2001, pp. 976-982.&nbsp;<\/li><li>Xubin He and Qing Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/DRALIC\/VCRAID.pdf\">&#8220;VC-RAID: A Large Virtual NVRAM Cache for Software Do-it-yourself RAID&#8221;&nbsp;<\/a>Proceedings of the International Symposium on Information Systems and Engineering (ISE&#8217;2001), June 2001, pp.334-340.&nbsp;<\/li><li>Yiming Hu, Ashwini Nanda and Qing Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/Apache\/journal_CA.pdf\">&#8220;Measurement, Analysis and Performance Improvement of the Apache Web Server&#8221;,&nbsp;<\/a>International Journal of Computers and Their Applications, Vol. 8, No. 4, Dec. 2001.<\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>2000&nbsp;<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li>Xubin He and Qing Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/DRALIC\/JPDC.pdf\">&#8220;Performance evaluation of distributed webservers under commercial workload&#8221;&nbsp;<\/a>in Proceedings of Internet Conference&#8217;2000, Las Vegas.<\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>1999&nbsp;<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li>Y. Hu, Qing Yang, and T. Nightingale,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/RAPID\/IEEE_draft.pdf\">&#8220;RAPID-Cache &#8212; A Reliable and Inexpensive Write Cache for Disk I\/O Systems&#8221;,&nbsp;<\/a>in The 5th International Symposium on High Performance Computer Architecture (HPCA-5). Orlando, Florida. Jan. 1999.<\/li><li>Xubin He and Qing Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/DCD\/DCD_Driver.pdf\">&#8220;A DCD Filter Driver for Windows NT 4&#8221;&nbsp;<\/a>Proceedings of the 12th International Conference on Computer Applications in Industry and Engineering (CAINE-99), Atlanta, Georgia, USA, Nov. 4-6,1999.&nbsp;<\/li><li>Yiming Hu, Ashwini Nanda and Qing Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/Apache\/\">&#8220;Measurement, Analysis and Performance Improvement of the Apache Web Server&#8221;,&nbsp;<\/a>in the 18th IEEE International Performance, Computing and Communications Conference (IPCCC&#8217;99), Phoenix\/Scottsdale, Arizona, February 1999.<\/li><li>T. Nightingale, Y. Hu, and Qing Yang,&nbsp;<a href=\"ftp:\/\/ftp.ele.uri.edu\/pub\/tycho\/USENIX99.ps.gz\">Design and Implementation of a DCD Device Driver for Unix<\/a>&nbsp;in Proceedings of the 1999 USENIX Annual Technical Conference, Monterey, Califoria, June 1999.<\/li><li>Li Yang, X. Pei, and Qing Yang &#8220;Performance Analysis of A new Disk Architecture as A Netserver for NFS Network Systems&#8221;, in Int&#8217;l Journal on Computers and Their Applications, Vol. 6, No. 3, Sept. 1999, pp. 159-165.<\/li><\/ul>\n\n\n\n<ul class=\"wp-block-list\"><li>T. Sun and Q. Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/vector\/comparison.pdf\">&#8220;A comparative analysis of cache memories for vector processing,&#8221;&nbsp;<\/a>in IEEE Trans. on Computers. Vol. 48, No. 3, pp. 331-344, March 1999.<\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>1998<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li>&nbsp;Y. Hu and Q. Yang&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/DCD\/DCD.html\">&#8220; A New Hierarchical Disk Architecture&#8221;, IEEE Micro,&nbsp;<\/a>Vol. 18, No. 6, Nov.\/Dec. 1998, pp.64-76.Q. Yang, Sridah Adina and T. Sun,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/vector\/1comp.pdf\">&#8220;Designing on-chip cache using complement numbers&#8221;,&nbsp;<\/a>in Journal of Parallel and Distributed Computing, Academic Press. Vol. 48, pp. 143-164, 1998.<\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>1997&nbsp;<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li>H. Wang, T. Sun and Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/CAT\/CAT.html\">&#8220;Minimizing area cost of on-chip cache memories by caching address tags&#8221;,&nbsp;<\/a>IEEE Trans. on Computers, Vol. 46, Number 11, Nov. 1997. pp. 1187-1201.<\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>1996&nbsp;<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li>Y. Hu and Qing Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/DCD\/isca.pdf\">&#8220;DCD&#8212;Disk Caching Disk: A New Approach for Boosting I\/O Performance,&#8221;&nbsp;<\/a>The 23rd Annual International Symposium on Computer Architecture, Philadelphia PA May, 1996. (ISCA&#8217;96)S. <\/li><li>Ray, H. Jiang and Q. Yang, &#8220;A Compiler-directed Approach to Network La tency Reduction in Distributed Shared Memory Multiprocessors&#8221;, Journal of Parallel and Distributed Computing, Special Issue on Compilation Techniques for Distributed Memory Systems. 38-2:267-276, 1996&nbsp;<\/li><li>Li Yang, X. Pei, and Qing Yang, &#8220;Performance Analysis of A new Disk Architecture as A Netserver for NFS Network Systems&#8221;&nbsp;Int&#8217;l Conference on Computer Applications in Industry and Engineering (CAINE-96), Dec. 1996.<\/li><li>C-M Chung, D-A Chiang and Qing Yang &#8220;A comparative analysis of different arbitration protocols for multiple-bus multiprocessors&#8221; International Journal of Computer Science and Enigeering. Vol. 11, No. 3,May 1996.<\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>1995<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li>&nbsp;H. Wang, T. Sun, and Q. Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/CAT\/CAT.html\">&#8220;Caching Address Tags: A technique to reduce chip area cost for on-chip caches,&#8221;&nbsp;<\/a>The 22nd Annual International Symposium on Computer Architecture,Santa Margherita Ligure, Italy, June, 1995. (ISCA&#8217;95)<\/li><li>Qing Yang and Tao Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/vector\/queue_fi.pdf\">&#8220;A memory interference model for regularly patterned multiple stream vector accesses,&#8221;&nbsp;<\/a>IEEE Transactions on Parallel and Distributed Systems, Vol. 6, No. 5, pp. 520-530, May 1995.<\/li><li>C. Hu, A. Frolov, B. Kearfott, and Q. Yang, &#8220;A General Sparse Interval Linear Solver and its Parallelization for the Interval Newton&#8217;s Methods,&#8221; International Journal on Reliable Computing, No. 3, 1995.<\/li><li>C. Hu, J. Sheldon, B. Kearfott, and Q. Yang, &#8220;Optimizing INTBIS on the CRAY Y-MP,&#8221; International Journal on Reliable Computing, No. 3, 1995.<\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>1994&nbsp;<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li>Chenyi Hu, Baker Kearfott, Joe Sheldon and Qing Yang, &#8220;Solving nonlinear systems on vector supercomputers,&#8221; Proc. Int&#8217;l Conf. on Parallel and Distributed Computing, Oct. 1994.<\/li><li>Sibabrata Ray, Hong Jiang and Qing Yang, &#8220;A New Approach To Network Latency Reduction of Multiprocessors by Data Migration in The Absence of Cache Coherence Mechanisms&#8221; Proc. Int&#8217;l Conf. on Parallel and Distributed Computing, Oct. 1994.<\/li><li>T. Sun and Q. Yang, &#8220;Evaluating cache performance for vector computers,&#8221; Proc. Int&#8217;l Conf. on Parallel and Distributed Computing, Oct. 1994.<\/li><li>N. Annupindi, M. An, J. W. Cooley and Qing Yang, &#8220;A new and efficient FFT algorithm for distributed memory systems,&#8221; Proceedings of Internation Conference on Parallel and Distributed Systems, Dec. 1994, Taiwan<\/li><li>T. Sun and Q. Yang, &#8220;A comparison of cached and uncached vector computers,&#8221; Proceedings of IEEE 1994 Int&#8217;l Conf. on Parallel and Distributed Sy<strong>ste<\/strong>ms, Oct. 1994.<\/li><\/ul>\n\n\n\n<ul class=\"wp-block-list\"><li>Tao Yang, Shengbin Hu and Qing Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/RAPID\/raid_cmr.pdf\">&#8220;A closed form formula for queueing delays in diskarrays ,&#8221;&nbsp;<\/a>Proceedings of 94&#8242; Int&#8217;l Conf. on Parallel Processing, Aug. 1994.<\/li><\/ul>\n\n\n\n<ul class=\"wp-block-list\"><li>Q. Yang and S. Adina,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/vector\/risc_cmr.pdf\">&#8220;A one&#8217;s complement cache,&#8221;&nbsp;<\/a>Proceedings of 94&#8242; Int&#8217;l Conf. on Parallel Processing, Aug. 1994.<\/li><li>Q. Gan, Q. Yang and C. Y. Hu, &#8220;Parallel all-row preconditioned interval linear solver for nonlinear equations on multiprocessors,&#8221; Parallel Computing, (20) 1994.<\/li><li>Xiaoshu Qian and Qing Yang, &#8220;An analytical model for load balancing on sy mmetric multiprocessor systems,&#8221; Journal of Parallel and Distributed Computing, Vol. 20, 1994, pp. 198-211.<\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>1993&nbsp;<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li>Qing Yang, &#8220;Introducing a new cache design into vector computers,&#8221; IEEE Transactions on Computers, Vol. 42, No. 12, Dec. 1993, pp. 1411-1424.&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/vector\/vector.html\">The Prime-mapped Cache&nbsp;<\/a><\/li><li>Qing Yang, &#8220;Guest Editor&#8217;s Introduction,&#8221; IEEE Computer Society Tech. Comm. on Comp. Arch. Newsletter, Special Issue on Cache Memories for Supercomputers, Oct. 1993.<\/li><li>Qing Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/vector\/alg_ana.pdf\">&#8220;Performance of cache memories for vector computers,&#8221;&nbsp;<\/a>Journal of Parallel and Distributed Computing, Special Issue on Performance of Supercomputers. 19 pp.163-178, 1993.<\/li><li>Qing Yang and H. Wang, &#8220;A graph approach to minimizing processor fragmen tations on hypercube multiprocessors&#8221;, IEEE Transactions on Parallel and Distributed Systems, Oct. 1993, pp. 1165-1171.<\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>1992<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li><strong>&nbsp;<\/strong>Q. Yang and Liping W. Yang,&nbsp;<a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/arch92.pdf\">&#8220;A novel cache design for vector processing,&#8221;&nbsp;<\/a>The 19th International Symposium on Computer Architecture, May 1992, pp. 362-371. Gold Coast, Austrilia. (ISCA&#8217;92)<\/li><li>H. Wang and Q. Yang, &#8220;On fault tolerant computation of orthogonal transforms on hypercube multiprocessors,&#8221; Proc. of 21th Int&#8217;l Conf. on Parallel Processing, Vol. 1, Aug. 1992.<\/li><li>Qing Yang, D. Ghosal, and S. K. Tripathi, &#8220;Performance study of two protocols for voice\/data integration on ring networks &#8220;, Computer Networks and ISDN Vol. 23, 1992, pp. 267-285.<\/li><li>Qing Yang, G. Thangadurai and L. N. Bhuyan, &#8220;Design of a dynamic cache co herence scheme for large scale multiprocessors&#8221;, IEEE Transactions on Parallel and Distributed Systems, Vol. 3, No. 3, May 1992, pp.281-293.<\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>1991&nbsp;<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li>Q. Yang, &#8220;Effects of arbitration protocols on the performance of multiple-bus multiprocessors,&#8221; Proc. of 20th Int&#8217;l Conf. on Parallel Processing, Vol. 1, 1991.<\/li><li>H. Wang and Q. Yang, &#8220;A Prime-Cube graph approach for processor allocation in hypercube multiprocessors,&#8221; Proc. of 20th Int&#8217;l Conf. on Parallel Processing, Vol. 1, pp. 25-32, 1991.<\/li><li>Qing Yang and X. Qian, &#8220;Load balancing on distributed multiprocessor architectures with LAL&#8221;, Proc. on 11th Int,l Conf. on Distributed Computing Systems, May 1991, pp. 402-409.<\/li><li>C. Hu, M. Bayoumi, B. Kearfott and Q. Yang, &#8220;A parallelized algorithm for the preconditioned interval Newton method,&#8221; Proc. 5th SIAM Conf. on Parallel Processing, March, 1991.<\/li><li>Qing Yang and L. N. Bhuyan, &#8220;Analysis of Packet-Switched Multiple-Bus Mult iprocessor Systems,&#8221; IEEE Transactions on Computers, Vol. 30, No. 3, March 1991, pp. 352-357.<\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>1990&nbsp;<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li>Q. Yang, G. Thangadurai and L. N. Bhuyan, &#8220;An adaptive cache coherence scheme for hierarchical shared-memory multiprocessors,&#8221; IEEE Symp. on Parallel Processing, Dec. 1990.<\/li><li>Qing Yang and R. Ravi, &#8220;Design and analysis of multiple-bus arbiters with different priority schemes&#8221;, Proc. of PARBASE-90&#8211;Int. Conf. on Database, Parallel Architectures, and Their Applications, pp 238-247 March, 1990.<\/li><li>Q. Yang, &#8220;On performance improvement of cache coherence protocols for hierarchical multiprocessors,&#8221; ISMM Int&#8217;l Conf. on Parallel and Distributed Computing, and Systems, Oct. 1990.<\/li><li>Qing Yang, &#8220;Performance analysis of a cache coherent multiprocessor based on hierarchical buses&#8221;, Proc. of PARBASE-90&#8211;Int. Conf. on Database, Parallel Architectures, and Their Applications, pp 248-257 March, 1990.<\/li><li>Qing Yang and L. N. Bhuyan, &#8220;Performance of Multiple-Bus Interconnections for Multiprocessors,&#8221; Journal of Parallel and Distributed Computing, 8. pp. 267-273 (1990).<\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>1989&nbsp;<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li>Qing Yang, L. N. Bhuyan and B. Liu, &#8220;Analysis and Comparison of Cache Cohe rence Protocols for a Packet-Switched Multiprocessor,&#8221; IEEE Transactions on Computers, Special Issue on Distributed Computer Systems, A ug. 1989, pp 1143-1153<\/li><li>.L. N. Bhuyan, D. Ghosal, and Qing Yang, &#8220;Approximate Analysis of Single a nd Multiple-ring Networks,&#8221; IEEE Transactions on Computers, July 1989, pp 1027-1040.<\/li><li>L. N. Bhuyan, Qing Yang and D. P. Agrawal, &#8220;Performance of Multiprocessor Interconnection Networks&#8221;, IEEE Computer, Feb. 1989.<\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>1988&nbsp;<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li>Q. Yang and L.N. Bhuyan, &#8220;A <strong>q<\/strong>ueueing network model for cache coherence protocol on asynchronous multiple-bus multiprocessors,&#8221; 88&#8217;Int,l Conf. on Parallel Processing, pp. 130-137, 1988.<\/li><li>Qing Yang and S. G. Zaky, &#8220;Communication performance in multiple-bus systems&#8221;, IEEE Transactions on Computers, Vol. 32, No. 7, pp. 848-853, July 1988.<\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>1987&nbsp;<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li>Q. Yang, L.N. Bhuyan, and R. Pavaskar, &#8220;Performance analysis of packet switched multiple-bus multiprocessor systems,&#8221; Proceedings of Eighth Real-Time System Symposium, Dec. 1987, pp. 170-178.<\/li><li>Q. Yang and L.N. Bhuyan, &#8220;Design and analysis of decentralized multiple-bus multiprocessor,&#8221; Proceedings of 87&#8217;Int&#8217;l Conf. on Parallel Processing, Aug. 1987, pp. 889-892.<\/li><\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>1986&nbsp;<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li>Q. Yang, D. Ghosal and L.N. Bhuyan, &#8220;Analysis of Multiple Token-ring and Multiple Slotted-ring Networks,&#8221; IEEE Proceedings Computer Networking Symposium, Washington D.C., Nov. 1986, pp 79-86.<\/li><\/ul>\n\n\n\n<div class=\"wp-block-columns is-layout-flex wp-container-core-columns-is-layout-9d6595d7 wp-block-columns-is-layout-flex\">\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\"><\/div>\n\n\n\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\"><\/div>\n\n\n\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\"><\/div>\n<\/div>\n","protected":false},"excerpt":{"rendered":"<p>2024 \u201cAn FPGA-Enabled Framework for Rapid Automated Design of Photonic Integrated Circuits\u201d, In Proceedings of the 2024 ACM\/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA &#8217;24). (Zhenyu Xu, Miaoxiang Yu, Jillian Cai, Saddam Gafsi, Judson Douglas Ryckman, Qing Yang, and Tao Wei). \u201cMachine Learning in Sensors for Collision Avoidance\u201d,&nbsp;(Erkan Karakus, Tao Wei and Qing [&hellip;]<\/p>\n","protected":false},"author":1294,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"_acf_changed":false,"footnotes":"","_links_to":"","_links_to_target":""},"class_list":["post-164","page","type-page","status-publish","hentry"],"acf":[],"_links":{"self":[{"href":"https:\/\/web.uri.edu\/hpcl\/wp-json\/wp\/v2\/pages\/164","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/web.uri.edu\/hpcl\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/web.uri.edu\/hpcl\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/web.uri.edu\/hpcl\/wp-json\/wp\/v2\/users\/1294"}],"replies":[{"embeddable":true,"href":"https:\/\/web.uri.edu\/hpcl\/wp-json\/wp\/v2\/comments?post=164"}],"version-history":[{"count":4,"href":"https:\/\/web.uri.edu\/hpcl\/wp-json\/wp\/v2\/pages\/164\/revisions"}],"predecessor-version":[{"id":1550,"href":"https:\/\/web.uri.edu\/hpcl\/wp-json\/wp\/v2\/pages\/164\/revisions\/1550"}],"wp:attachment":[{"href":"https:\/\/web.uri.edu\/hpcl\/wp-json\/wp\/v2\/media?parent=164"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}