{"id":179,"date":"2020-07-15T19:15:46","date_gmt":"2020-07-15T23:15:46","guid":{"rendered":"https:\/\/web.uri.edu\/hpcl\/?page_id=179"},"modified":"2024-04-25T12:23:04","modified_gmt":"2024-04-25T16:23:04","slug":"graduate-students-advised","status":"publish","type":"page","link":"https:\/\/web.uri.edu\/hpcl\/graduate-students-advised\/","title":{"rendered":"Graduate Students Advised"},"content":{"rendered":"\n<h2 class=\"wp-block-heading\">Ph.D Degree&nbsp;<\/h2>\n\n\n\n<ul class=\"wp-block-list\"><li><a href=\"https:\/\/www.linkedin.com\/in\/hongwang\/\"><strong>Hong Wang,\u00a0<\/strong>Ph.D<\/a><a href=\"https:\/\/newsroom.intel.com\/biography\/hong-wang\/\">,\u00a0\u00a0<\/a><br>Thesis title: &#8220;Resource Allocation in High Performance Computer Systems,&#8221; Date Graduated: Jan. 5, 1996.\u00a0<strong>Employment after graduation:\u00a0<\/strong>Director of Microarchitecture Research Lab (MRL) Intel Co. Winner of\u00a0\u00a0<strong>Intel Accomplishment Award and Intel Fellow.<\/strong><\/li><li><a href=\"https:\/\/research.adobe.com\/person\/tong-sun\/\"><strong>Tong Sun,\u00a0<\/strong>Ph.D,\u00a0\u00a0<\/a><br>Ph.D, Thesis title: &#8220;Design and Performance Evaluation of Cache Memories for High Performance Computers,&#8221; Date Graduated: April, 1996.\u00a0<strong>Employment after graduation:\u00a0<\/strong><a href=\"https:\/\/www.edx.org\/bio\/tong-sun\">Adjunct Professor, Computing Security at RIT, <\/a><a href=\"https:\/\/research.adobe.com\/person\/tong-sun\/\">Research Lab Director<\/a>, Adobe.<\/li><li><a href=\"https:\/\/www.linkedin.com\/in\/nageshanupindi\/\"><strong>Nagesh Anupindi,\u00a0<\/strong>Ph.D,<\/a><a href=\"http:\/\/www.ittoolbox.com\/profiles\/nagesh_anupindi\">\u00a0<\/a><br>Thesis title: &#8220;Data Partition and Migration for High Performance Computation in Distributed Memory Multiprocessors,&#8221; Date Graduated: Sept., 1994.\u00a0<strong>First Employment after graduation:\u00a0<\/strong>Senior Scientist, Aware Inc., Cambridge,MA.\u00a0<\/li><li><a href=\"https:\/\/researchdirectory.uc.edu\/p\/huyg\"><strong>Yiming Hu,\u00a0<\/strong>Ph.D,\u00a0<\/a><br>Dissertation Title: &#8220;Design and Performance Evaluation of New I\/O Architectures &#8220;, Date Graduated: Dec. 16, 1998.\u00a0<strong>Employment after graduation<\/strong>: Associate Professor, Dept. of ECE, University of Cincinnati. Winner of 2000\u00a0<strong>NSF Career Award<\/strong>, <a href=\"https:\/\/500px.com\/yiminghu\">Well-known  award-winning photographer specializing in fine art landscape photography, nature photography, and travel photography.<\/a><\/li><li><a href=\"https:\/\/cis.temple.edu\/~he\/\"><strong>Ben He,\u00a0<\/strong>Ph.D,<\/a><a href=\"https:\/\/cis.temple.edu\/user\/447\">\u00a0<\/a><br>Dissertation Title: &#8220;Design and Performance Evaluation of Networked Storage Architectures&#8221; Date Graduated: August, 2002.\u00a0<strong>Employment after graduation<\/strong>: Professor\u00a0<a href=\"https:\/\/cis.temple.edu\/user\/447\">Department of Computer and Information Sciences at Temple University.<\/a><\/li><li><a href=\"https:\/\/egr.vcu.edu\/directory\/weijun.xiao\/\"><strong>Weijun Xiao,\u00a0<\/strong>Ph.D,\u00a0<\/a><br>Dissertation Title: &#8220;Design and Analysis of High-performance and Recoverable Data Storage&#8221; Date Graduated: May 2009.\u00a0<a href=\"http:\/\/www.ele.uri.edu\/news\/misc\/weijunxiao.html\"><strong>Named as Computing Innovation Fellow by the Computing Community Consortium (CCC) and the Computing Research Association (CRA) funded by NSF\u00a0<\/strong><\/a><strong>Employment after graduation<\/strong>: Associate Professor, Department of Electrical and Computer Engineering Virginia Commonwealth University\u00a0<\/li><li><a href=\"https:\/\/www.ele.uri.edu\/Research\/hpcl\/www.linkedin.com\/in\/blackmagic02881\"><strong>Ming Zhang,\u00a0<\/strong>Ph.D,\u00a0<\/a><br>Dissertation Title: &#8220;Toward high performance and highly reliable storage services&#8221; Date Graduated: Dec. 2004.\u00a0<strong>Employment after graduation<\/strong>: Consultant Software Engineer, EMC.<\/li><li><a href=\"https:\/\/www.linkedin.com\/in\/jin-ren-11136621\/\">Jin Ren,\u00a0<\/a>Dissertation Title: &#8220;High Performance SSD Storage&#8221;, Jan. 2011.\u00a0<strong>Employment after graduation<\/strong>: Senior Architect,\u00a0<a href=\"http:\/\/www.wdc.com\/\">Western Digital Corp.\u00a0<\/a><\/li><li><a href=\"https:\/\/engineering.sfsu.edu\/faculty-profile-xiaorong-zhang\">Xiaorong Zhang,\u00a0<\/a>Dissertation Title: &#8220;Cyber Physical System for Neural-Machine Interface&#8221;, May 2013.\u00a0<strong>Employment after graduation<\/strong>: Tenure Track Assistant Professor, San Fransisco State University\u00a0<a href=\"http:\/\/engineering.sfsu.edu\/news\/archive\/20180402news.html\">Winner of NSF Career Award.<\/a><\/li><li><a href=\"https:\/\/www.linkedin.com\/in\/robert-hernandez-09043ba0\"><strong>Robert Hernandez,<\/strong>\u00a0<\/a>Dissertation Title: &#8220;SVM-BASED VOLITIONAL ARTIFICIAL LEG CONTROL VIA UBIQUITOUS SMALL AND LOW POWER ARCHITECTURES&#8221; May, 2014.<strong>Employment after graduation<\/strong>: Lead Systems Engineer, NUWC, RI.\u00a0<a href=\"https:\/\/web.uri.edu\/engineering\/uri-engineering-alumnus-earns-presidential-award-for-scientists\/\"><strong>Recipient of the Presidential Early Career Award in Science and Engineering (PECASE)<\/strong>:<\/a><\/li><li><a href=\"http:\/\/digitalcommons.uri.edu\/cgi\/viewcontent.cgi?article=1449&amp;context=oa_diss\"><strong>Jason Kane,<\/strong>\u00a0<\/a>Dissertation Title: &#8221; &#8220;Research Into Computer Hardware Acceleration of Data Reduction and SVMS&#8221; (2016) May, 2016.\u00a0<strong>Employment after graduation<\/strong>: Lead Systems Engineer, NUWC, RI.<\/li><li><strong><a href=\"https:\/\/www.linkedin.com\/in\/dongyang-li-32461a111\/\">Dongyang<\/a> <a href=\"https:\/\/www.linkedin.com\/in\/dongyang-li-32461a111\/\">Li<\/a>,<\/strong>\u00a0Dissertation Title: &#8221; &#8220;PROCESSING IN STORAGE, THE NEXT GENERATION OF STORAGE SYSTEM&#8221; (2019) May, 2019.\u00a0<strong>Employment after graduation<\/strong>: CISCO, Senior Architect.<\/li><li><strong><a href=\"https:\/\/www.linkedin.com\/in\/jing-yang-a9094141\/\">Jing Yang<\/a>,<\/strong>\u00a0Dissertation Title: &#8221; &#8220;ACCELERATING DATA ACCESSING BY EXPLOITING FLASH MEMORY TECHNOLOGIES&#8221; (2019) Aug. 2019. <strong>Employment after graduation: <\/strong>Research and Development Engineer, Samsung.<\/li><li><a href=\"https:\/\/www.linkedin.com\/in\/shuyi-pei-091404a5\/\"><strong>Shuyi Pei<\/strong><\/a>, \u201cREMOVING PERFORMANCE BOTTLENECKS ON SSDS AND SSD-BASED STORAGE SYSTEMS\u201d, May, 2021, <strong>Employment after graduation: <\/strong>Research and Development Engineer, Samsung.<\/li><\/ul>\n\n\n\n<hr class=\"wp-block-separator\" \/>\n\n\n\n<div class=\"wp-block-columns is-layout-flex wp-container-core-columns-is-layout-9d6595d7 wp-block-columns-is-layout-flex\">\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\"><\/div>\n\n\n\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\"><\/div>\n\n\n\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\"><\/div>\n<\/div>\n","protected":false},"excerpt":{"rendered":"<p>Ph.D Degree&nbsp; Hong Wang,\u00a0Ph.D,\u00a0\u00a0Thesis title: &#8220;Resource Allocation in High Performance Computer Systems,&#8221; Date Graduated: Jan. 5, 1996.\u00a0Employment after graduation:\u00a0Director of Microarchitecture Research Lab (MRL) Intel Co. Winner of\u00a0\u00a0Intel Accomplishment Award and Intel Fellow. Tong Sun,\u00a0Ph.D,\u00a0\u00a0Ph.D, Thesis title: &#8220;Design and Performance Evaluation of Cache Memories for High Performance Computers,&#8221; Date Graduated: April, 1996.\u00a0Employment after graduation:\u00a0Adjunct Professor, [&hellip;]<\/p>\n","protected":false},"author":1294,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"_acf_changed":false,"footnotes":"","_links_to":"","_links_to_target":""},"class_list":["post-179","page","type-page","status-publish","hentry"],"acf":[],"_links":{"self":[{"href":"https:\/\/web.uri.edu\/hpcl\/wp-json\/wp\/v2\/pages\/179","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/web.uri.edu\/hpcl\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/web.uri.edu\/hpcl\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/web.uri.edu\/hpcl\/wp-json\/wp\/v2\/users\/1294"}],"replies":[{"embeddable":true,"href":"https:\/\/web.uri.edu\/hpcl\/wp-json\/wp\/v2\/comments?post=179"}],"version-history":[{"count":5,"href":"https:\/\/web.uri.edu\/hpcl\/wp-json\/wp\/v2\/pages\/179\/revisions"}],"predecessor-version":[{"id":1580,"href":"https:\/\/web.uri.edu\/hpcl\/wp-json\/wp\/v2\/pages\/179\/revisions\/1580"}],"wp:attachment":[{"href":"https:\/\/web.uri.edu\/hpcl\/wp-json\/wp\/v2\/media?parent=179"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}