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2024

1. “An FPGA-Enabled Framework for Rapid Automated Design of Photonic Integrated Circuits”, In Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA ’24). (Zhenyu Xu, Miaoxiang Yu, Jillian Cai, Saddam Gafsi, Judson Douglas Ryckman, Qing Yang, and Tao Wei).
2. “Machine Learning in Sensors for Collision Avoidance”, (Erkan Karakus, Tao Wei and Qing Yang), in Proceedings of International Conference on Computing, Networking and Communications (ICNC 2024) pp. 291-295

2023

• “A Novel FPGA Simulator Accelerating Reinforcement Learning-Based Design of Power Converters”. Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays. (Zhenyu Xu, Miaoxiang Yu, Qing Yang, Yeonho Jeong, Tao Wei)

2022

• “A Novel FPGA-Based Circuit Simulator for Accelerating Reinforcement Learning-Based Design of Power Converters”. 34th IEEE International Conference on Application-specific Systems, Architectures and Processors.. Porto, Portugal. (Zhenyu Xu, Miaoxiang Yu, Qing Yang, Yeonho Jeong, Jillian Cai and Tao Wei)
• “A Novel Interconnection Architecture for Secured Die-to-Die Communication in System-in-Package. 2022 IEEE International Conference on Networking, Architecture and Storage (NAS). (Zhenyu Xu, Qing Yang, Tao Wei)
• “Highly Scalable Runtime Countermeasure Against Microprobing Attacks on Die-to-Die Interconnections in System-in-Package”, Proceedings of the 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays. (Zhenyu Xu, Thomas Mauldin, Qing Yang, Tao Wei)
• “A Novel Interconnection Architecture for Secured Die-to-Die Communication in System-in-Package”
• Zhenyu Xu, Tao Wei and Qing Yang, 16^th IEEE International Conference on Networking, Architecture and Storage, Oct 3-4, 2022, Philadelphia, USA.
• “In-Sensor Neural Network Preprocessing for ADAS Computer Systems” , Mark Bruckner, Erkan Karakus, Tao Wei and Qing Yang, 16^th IEEE International Conference on Networking, Architecture and Storage, 2022, Philadelphia, USA.

2020 

• “A bus authentication and anti-probing architecture extending hardware trusted computing base off CPU chip and beyond”, Z. Xu, T. Mauldin, Z. Yao, S. Pei, T. Wei, and Qing Yang, ACM/IEEE International Symposium on Computer Architecture (ISCA 2020), May 30-June 3, 2020.

2019 

• “REGISTOR: A Platform for Unstructured Data Processing Inside SSD Storage”, Shuyi Pei, Jing Yang and Qing Yang, ACM Transaction on Storage, Vol. 15, No. 1, April 2019. 

• “WARCIP: write amplification reduction by clustering I/O pages”, Jing Yang, Shuyi Pei, and Qing Yang, in Proceedings of the 12th ACM International Conference on Systems and Storage (SYSTOR ’19). 2019, ACM, New York, NY, USA.

2018

2017 

2015 

• “Reflex-Tree: A Biologically Inspired Parallel Architecture for Future Smart Cities”, Jason Kane, Bo Tang, Zhen Chen, Jun Yan, Tao Wei, Haibo He and Qing Yang, The 44th Annual Conference, International Conference on Parallel Processing, Sept. 1-4, 2015.
• “Fog Data: Enhancing Telehealth Big Data Through Fog Computing”, Harishchandra Dubey, Jing Yang, Nick Constant, Amir Mohammad Amiri, Qing Yang, Kunal Makodiya, Int’l Conference on BigData, Kaohsiung Taiwan, Oct 2015. 
• “A Reconfigurable Multiclass Support Vector Machine Architecture for Real-Time Embedded Systems Classification”, Jason Kane, Robert Hernandez, and Qing Yang, The 23rd IEEE International Symposium on Field-Programmable Custom Computing Machines, May 3-5, 2015, Vancouver, British Columbia, Canada.
• “A Parallel and Pipelined Architecture for Accelerating Fingerprint Computation in High Throughput Data Storages “, Dongyang Li, Qing Yang, Qingbo Wang, Cyril Guyot, Ashwin Narasimha, Dejan Vucinic, Zvonimir Bandic, The 23rd IEEE International Symposium on Field-Programmable Custom Computing Machines, May 3-5, 2015, Vancouver, British Columbia, Canada.
• “F/M-CIP: Implementing Flash Memory Cache Using Conservative Insertion and Promotion”, Jing Yang and Qing Yang, Published in: 2015 15th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (CCGrid), May 4-7 2015.

2014 

• Jiguang Wan, Jibin Wang, Changsheng Xie, Qing Yang, “S^2-RAID: Parallel RAID Architecture for Fast Data Recovery,” IEEE Transactions on Parallel and Distributed Systems, vol. 25, no. 6, pp. 1638-1647, June 2014. IEEE computer Society Digital Library. IEEE Computer Society, 

2013 

• Hernandez, Robert; Yang, Qing; Huang, He; Zhang, Fan; and Zhang, Xiaorong “Design and Implementation of a Low Power Mobile CPU Based Embedded System for Artificial Leg Control”, 35th Annual International IEEE EMBS Conference, July 3-7, 2013, Osaka, Japan.
• Jeffrey Carvell, Ruihua Cheng, and Qing Yang, “INDUCED MAGNETO-ELECTRIC COUPLING AT FERROELECTRIC/FERROMAGNETIC INTERFACE” Journal of Applided Physics, 113, 17C715 (2013). http://dx.doi.org/10.1063/1.4794873
• Jing Yang and Qing Yang, “A New Metadata Update Method for Fast Recovery of SSD Cache,” The 8th IEEE International Conference on Networking, Architecture, and Storage (NAS 2013), July, 2013, Xi’an, China.
• Xiaorong Zhang, He Huang, and Qing Yang, “Real-Time Implementation of a Self-Recovery EMG Pattern Recognition Interface for Artificial Arms,” 35th Annual International IEEE EMBS Conference, July 3-7, 2013, Osaka, Japan.

2012 

• Jason Kane and Qing Yang, “Compression Speed Enhancements to Lepel-Ziv-Oberhumer for Multi-Core Systems,” 24th International Symposium on Computer Architecture and High Performance Computing, October 24-26, 2012.
• Jing Yang, Qiang Cao, Xu Li, Changsheng Xie, and Qing Yang, “ST-CDP: Snapshots in TRAP for Continuous Data Protection”, IEEE Transaction on Computers, vol. 61, Number 6, June 2012, pp. 753-766.
• Xiaorong Zhang, He Huang, and Qing Yang, “Implementing an FPGA system for real-time intent recognition for prosthetic legs,” In Proceedings of the 49th Annual Design Automation Conference (DAC ’12). ACM, New York, NY, USA, 169-175. DOI=10.1145/2228360.2228394 http://doi.acm.org/10.1145/2228360.2228394 
• Xiaorong Zhang, Yuhong Liu, Fan Zhang, Jin Ren, Yan (Lindsay) Sun, Qing Yang, and He Huang, “On Design and Implementation of Neural- Machine Interface for Artificial Legs”, IEEE Transactions on Industrial Informatics, Volume: 8, Issue 2, (2012), pp. 418-429.
• Xiaorong Zhang, Ding Wang, Qing Yang, and He Huang, “An Automatic and User-Driven Training Method for Locomotion Mode Recognition for Artificial Leg Control”, Conf Proc IEEE Eng Med Biol Soc, (2012). 

2011

•  Jin Ren and Qing Yang “I-CASH: Intelligently Coupled Array of SSD and HDD” in The 17th IEEE International Symposium on High Performance Computer Architecture, 2011 (HPCA’11), San Antonio, TX, Feb 2011.
• X. Zhang, H. Huang, and Q. Yang, “A special purpose embedded system for neural machine interface for artificial legs” Conf Proc IEEE Eng Med Biol Soc. 2011;2011:5207-10.
• Fan Zhang, Will DiSanto, Jin Ren, Zhi Dou, Qing Yang, and He Huang, “A Novel CPS System for Evaluating a Neural-Machine Interface for Artificial Legs” ACM/IEEE Second International Conference on Cyber-Physical Systems, Chicago, April 12 – 14, 2011.

2010 

• Jin Ren and Qing Yang A New Buffer Cache Design Exploiting both Temporal and Content Localities The 30th International Conference on Distributed Computing Systems, ICDCS 2010. Genoa, Italy, June 21-25, 2010.
• Jiguang Wan, Jibin Wang, Qing Yang, and Changsheng Xie, “S2-RAID: A New RAID Architecture for Fast Data Recovery” Proceedings of 26th IEEE Symposium on Massive Storage Systems and Technologies, Lake Tahoe, Incline Village, Nevada, May 3-7, 2010
• He Huang, Yan (Lindsay) Sun, Qing Yang, Fan Zhang, Xiaorong Zhang, Yuhong Liu, Jin Ren, Fabian Sierra. “Integrating Neuromuscular and Cyber Systems for Neural Control of Artificial Legs” ACM/IEEE International Conference on Cyber-Physical Systems Stockholm, Sweden. April, 2010.
• Qing Yang “Secure and Efficient Data Replay in Distributed eHealthcare Information System,” International Conference on Information Society (i-Society 2010) June 28-30, 2010, London, UK.
• X. Zhang, H. Huang, and Q. Yang, “Design and implementation of a special purpose embedded system for neural machine interface,” 2010 IEEE International Conference on Computer Design (ICCD), pp 166-172, Oct. 3-6, 2010. 

2009

•  Yang, Y., Sun, Y. L., Kay, S., and Yang, Q. 2009. Defending online reputation systems against collaborative unfair raters through signal modeling and trust. In Proceedings of the 2009 ACM Symposium on Applied Computing (Honolulu, Hawaii). SAC ’09. ACM, New York, NY, 1308-1315. DOI= http://doi.acm.org/10.1145/1529282.1529575 
• Weijun Xiao and Qing Yang, “A Case for Continuous Data Protection at Block Level in Disk Array Storages” ” IEEE Transactions on Parallel and Distributed Systems, Volume 20, Issue 6 (June 2009), Pages 898-911.
• Weijun Xiao, Qing Yang, J. Ren, C. Xie, and H. Li, “Design and Analysis of Block Level Snapshots for Data Protection and Recovery” IEEE Trans. Comput. 58, 12 (Dec. 2009), 1615-1625. DOI= http://dx.doi.org/10.1109/TC.2009.107 

2008 

• Weijun Xiao and Qing Yang, “Can We Really Recover Data If Storage Subsystem Fails?” Proceedings of IEEE International Conference on Distributed Computer Systems,” June, 2008.
• X. Li, C. Xie, and Qing Yang, “Optimal Implementation of Continuous Data Protection (CDP) in Linux Kernel,” in Proc. Of IEEE Int.l Conference on Network, Architecture, and Storages, June, 2008.

2007 

• Y. Yang, Y. Sun, J. Ren, and Q. Yang, “Building trust in onling rating systems through signal modeling.” Proc. of International Workshop on Trust and Reputation Management in Massively Distributed Computing Systems, June 25-29, 2007, in conjunction with ICDCS 2007,Toronto Canada.

2006 

• Qing Yang, Weijun Xiao, and Jin Ren, “TRAP-Array: A Disk Array Architecture Providing Timely Recovery to Any Point-in-time” in Proc. of The 33rd Annual International Symposium on Computer Architecture, 2006 (ISCA’06)
• Qing Yang, Weijun Xiao, and Jin Ren, “PRINS: Optimizing Performance of Reliable Internet Storages” The 26th International Conference on Distributed Computing Systems, Lisbon, Portugal, 2006. (ICDCS’06)
• W. Xiao, Y. Liu, Qing Yang, J. Ren, and C. Xie. “Implementation and Performance Evaluation of Two Snapshot Methods on iSCSI Target Storages”  in Proceedings of NASA/IEEE 14th Conf. on Mass Storage Systems and Technologies, May 2006
• Qing Yang “On Performance of Parallel iSCSI Protocol for Networked Storage Systems” in Proceedings of IEEE Int’l Conf on Advanced Information Networking and ApplicationsVienna, Austria, April 2006.

2005 

• Xubin He, Ming Zhang, and Qing Yang, “SPEK: A storage performance evaluation kernel module for block level storage systems under faulty conditions” IEEE Transaction on Dependable and Secure Computing , Vol. 2, No. 2, April-June 2005, pp. 138-149.

2004 

• Ming Zhang and Qing Yang, “BUCS – A Bottom-Up Cache Structure for Networked Storage Servers”, Proc. of International Conference on Parallel Processing., Montreal, Canada, Aug, 2004, pp.310-317.
• Ming Zhang, Yinan Liu, and Qing Yang, “Cost-Effective Remote Mirroring Using the iSCSI Protocol”, 21st IEEE Conference on Mass Storage Systems and Technologies, April, 2004, pp.385-398.
• Xubin He, Ming Zhang, and Qing Yang, “STICS: SCSI-To-IP Cache for Storage Area Networks”, Journal of Parallel and Distributed Computing , vol. 64, No. 9, pp. 1069-1085, September 2004.
• Xubin He and Qing Yang “Performance Evaluation of Distributed Web Server Architectures under E-Commerce Workloads” Submitted to Journal of Parallel and Distributed Computing.

2003 

• Ming Zhang, Qing Yang, and Xubin He, “SPEK: A Storage Performance Evaluation Kernel Module for Block Level Storage Systems”, Proc. Of MASCOTS 2003, Oct 2003.

• Ming Zhang and Qing Yang, “Evaluating Availability of Networked Storages Using Commercial Workload”, presented at Sixth Workshop on Computer Architecture Evaluation using Commercial Workloads (CAECW), Feb, 2003. 
• Ming Zhang and Qing Yang, “N-SPEK: A Performability Benchmark Tool for Networked Storage Systems”, Workshop on Parallel I/O in Cluster Computing and Computational Grids., 12-15 May 2003, Toshi Center Hotel, Tokyo, JAPAN 
• Ming Zhang and Xubin He, “A Unified, Low-overhead Framework to Support Continuous Profiling and Optimization”, in Proceedings of 22nd IEEE International Performance Computing and Communications Conference (IPCCC�2003), Phoenix, Arizona, April 2003. 
• Scott Lloyd, Qing Yang, Joan Peckham, and Jian Li, “RORIB, An economic and efficient solution for Real-time, Online, Remote Informa tion Backup,” Journal of Database Management, JDM S00-294, Vol. 14, No. 3, July-Sept. 2003, pp. 56-73.

2002 

• Xubin He, Qing Yang, and Ming Zhang, “A Caching Strategy to Improve iSCSI Performance,” in Proc. of IEEE Annual Conference on Local Computer Networks, Nov. 6-8,2002.
• Xubin He, Qing Yang, and Ming Zhang, “Introducing SCSI-To-IP Cache for Storage Area Networks”, IEEE International conference on Parallel Processing (ICPP’2002), August 2002, pp. 203-210.
• Xubin He and Qing Yang “On Design and Implementation of a Large Virtual NVRAM Cache for Software RAID”, in Special Issue of Calculateurs Parallel Journal on Parallel I/O for Cluster Computing, 2002 spring.
• Y. Hu, T. Nightingale and Q. Yang, “RAPID-Cache — A Reliable and Inexpensive Write Cache for High Performance Storage Systems”, IEEE Transactions on Parallel and Distributed Systems, Vol. 13, No. 3. March 2002, pp.290-307.

2001 

• Xubin He, Ming Zhang, and Qing Yang, “DRALIC: A Peer-to-Peer Storage Architecture” Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA’2001), Volume II, June 2001, pp. 908-913. 
• Xubin He and Qing Yang, “Characterizing the Home Pages” Proceedings of the 2nd International Conference on Internet Computing (IC?2001), June 2001, pp. 976-982. 
• Xubin He and Qing Yang, “VC-RAID: A Large Virtual NVRAM Cache for Software Do-it-yourself RAID” Proceedings of the International Symposium on Information Systems and Engineering (ISE’2001), June 2001, pp.334-340. 
• Yiming Hu, Ashwini Nanda and Qing Yang, “Measurement, Analysis and Performance Improvement of the Apache Web Server”, International Journal of Computers and Their Applications, Vol. 8, No. 4, Dec. 2001.

2000 

• Xubin He and Qing Yang, “Performance evaluation of distributed webservers under commercial workload” in Proceedings of Internet Conference’2000, Las Vegas.

1999 

• Y. Hu, Qing Yang, and T. Nightingale, “RAPID-Cache — A Reliable and Inexpensive Write Cache for Disk I/O Systems”, in The 5th International Symposium on High Performance Computer Architecture (HPCA-5). Orlando, Florida. Jan. 1999.
• Xubin He and Qing Yang, “A DCD Filter Driver for Windows NT 4” Proceedings of the 12th International Conference on Computer Applications in Industry and Engineering (CAINE-99), Atlanta, Georgia, USA, Nov. 4-6,1999. 
• Yiming Hu, Ashwini Nanda and Qing Yang, “Measurement, Analysis and Performance Improvement of the Apache Web Server”, in the 18th IEEE International Performance, Computing and Communications Conference (IPCCC’99), Phoenix/Scottsdale, Arizona, February 1999.
• T. Nightingale, Y. Hu, and Qing Yang, Design and Implementation of a DCD Device Driver for Unix in Proceedings of the 1999 USENIX Annual Technical Conference, Monterey, Califoria, June 1999.
• Li Yang, X. Pei, and Qing Yang “Performance Analysis of A new Disk Architecture as A Netserver for NFS Network Systems”, in Int’l Journal on Computers and Their Applications, Vol. 6, No. 3, Sept. 1999, pp. 159-165.

• T. Sun and Q. Yang, “A comparative analysis of cache memories for vector processing,” in IEEE Trans. on Computers. Vol. 48, No. 3, pp. 331-344, March 1999.

1998

•  Y. Hu and Q. Yang “ A New Hierarchical Disk Architecture”, IEEE Micro, Vol. 18, No. 6, Nov./Dec. 1998, pp.64-76.Q. Yang, Sridah Adina and T. Sun, “Designing on-chip cache using complement numbers”, in Journal of Parallel and Distributed Computing, Academic Press. Vol. 48, pp. 143-164, 1998.

1997 

• H. Wang, T. Sun and Yang, “Minimizing area cost of on-chip cache memories by caching address tags”, IEEE Trans. on Computers, Vol. 46, Number 11, Nov. 1997. pp. 1187-1201.

1996 

• Y. Hu and Qing Yang, “DCD—Disk Caching Disk: A New Approach for Boosting I/O Performance,” The 23rd Annual International Symposium on Computer Architecture, Philadelphia PA May, 1996. (ISCA’96)S.
• Ray, H. Jiang and Q. Yang, “A Compiler-directed Approach to Network La tency Reduction in Distributed Shared Memory Multiprocessors”, Journal of Parallel and Distributed Computing, Special Issue on Compilation Techniques for Distributed Memory Systems. 38-2:267-276, 1996 
• Li Yang, X. Pei, and Qing Yang, “Performance Analysis of A new Disk Architecture as A Netserver for NFS Network Systems” Int’l Conference on Computer Applications in Industry and Engineering (CAINE-96), Dec. 1996.
• C-M Chung, D-A Chiang and Qing Yang “A comparative analysis of different arbitration protocols for multiple-bus multiprocessors” International Journal of Computer Science and Enigeering. Vol. 11, No. 3,May 1996.

1995

•  H. Wang, T. Sun, and Q. Yang, “Caching Address Tags: A technique to reduce chip area cost for on-chip caches,” The 22nd Annual International Symposium on Computer Architecture,Santa Margherita Ligure, Italy, June, 1995. (ISCA’95)
• Qing Yang and Tao Yang, “A memory interference model for regularly patterned multiple stream vector accesses,” IEEE Transactions on Parallel and Distributed Systems, Vol. 6, No. 5, pp. 520-530, May 1995.
• C. Hu, A. Frolov, B. Kearfott, and Q. Yang, “A General Sparse Interval Linear Solver and its Parallelization for the Interval Newton’s Methods,” International Journal on Reliable Computing, No. 3, 1995.
• C. Hu, J. Sheldon, B. Kearfott, and Q. Yang, “Optimizing INTBIS on the CRAY Y-MP,” International Journal on Reliable Computing, No. 3, 1995.

1994 

• Chenyi Hu, Baker Kearfott, Joe Sheldon and Qing Yang, “Solving nonlinear systems on vector supercomputers,” Proc. Int’l Conf. on Parallel and Distributed Computing, Oct. 1994.
• Sibabrata Ray, Hong Jiang and Qing Yang, “A New Approach To Network Latency Reduction of Multiprocessors by Data Migration in The Absence of Cache Coherence Mechanisms” Proc. Int’l Conf. on Parallel and Distributed Computing, Oct. 1994.
• T. Sun and Q. Yang, “Evaluating cache performance for vector computers,” Proc. Int’l Conf. on Parallel and Distributed Computing, Oct. 1994.
• N. Annupindi, M. An, J. W. Cooley and Qing Yang, “A new and efficient FFT algorithm for distributed memory systems,” Proceedings of Internation Conference on Parallel and Distributed Systems, Dec. 1994, Taiwan
• T. Sun and Q. Yang, “A comparison of cached and uncached vector computers,” Proceedings of IEEE 1994 Int’l Conf. on Parallel and Distributed Systems, Oct. 1994.

• Tao Yang, Shengbin Hu and Qing Yang, “A closed form formula for queueing delays in diskarrays ,” Proceedings of 94′ Int’l Conf. on Parallel Processing, Aug. 1994.

• Q. Yang and S. Adina, “A one’s complement cache,” Proceedings of 94′ Int’l Conf. on Parallel Processing, Aug. 1994.
• Q. Gan, Q. Yang and C. Y. Hu, “Parallel all-row preconditioned interval linear solver for nonlinear equations on multiprocessors,” Parallel Computing, (20) 1994.
• Xiaoshu Qian and Qing Yang, “An analytical model for load balancing on sy mmetric multiprocessor systems,” Journal of Parallel and Distributed Computing, Vol. 20, 1994, pp. 198-211.

1993 

• Qing Yang, “Introducing a new cache design into vector computers,” IEEE Transactions on Computers, Vol. 42, No. 12, Dec. 1993, pp. 1411-1424. The Prime-mapped Cache 
• Qing Yang, “Guest Editor’s Introduction,” IEEE Computer Society Tech. Comm. on Comp. Arch. Newsletter, Special Issue on Cache Memories for Supercomputers, Oct. 1993.
• Qing Yang, “Performance of cache memories for vector computers,” Journal of Parallel and Distributed Computing, Special Issue on Performance of Supercomputers. 19 pp.163-178, 1993.
• Qing Yang and H. Wang, “A graph approach to minimizing processor fragmen tations on hypercube multiprocessors”, IEEE Transactions on Parallel and Distributed Systems, Oct. 1993, pp. 1165-1171.

1992

•  Q. Yang and Liping W. Yang, “A novel cache design for vector processing,” The 19th International Symposium on Computer Architecture, May 1992, pp. 362-371. Gold Coast, Austrilia. (ISCA’92)
• H. Wang and Q. Yang, “On fault tolerant computation of orthogonal transforms on hypercube multiprocessors,” Proc. of 21th Int’l Conf. on Parallel Processing, Vol. 1, Aug. 1992.
• Qing Yang, D. Ghosal, and S. K. Tripathi, “Performance study of two protocols for voice/data integration on ring networks “, Computer Networks and ISDN Vol. 23, 1992, pp. 267-285.
• Qing Yang, G. Thangadurai and L. N. Bhuyan, “Design of a dynamic cache co herence scheme for large scale multiprocessors”, IEEE Transactions on Parallel and Distributed Systems, Vol. 3, No. 3, May 1992, pp.281-293.

1991 

• Q. Yang, “Effects of arbitration protocols on the performance of multiple-bus multiprocessors,” Proc. of 20th Int’l Conf. on Parallel Processing, Vol. 1, 1991.
• H. Wang and Q. Yang, “A Prime-Cube graph approach for processor allocation in hypercube multiprocessors,” Proc. of 20th Int’l Conf. on Parallel Processing, Vol. 1, pp. 25-32, 1991.
• Qing Yang and X. Qian, “Load balancing on distributed multiprocessor architectures with LAL”, Proc. on 11th Int,l Conf. on Distributed Computing Systems, May 1991, pp. 402-409.
• C. Hu, M. Bayoumi, B. Kearfott and Q. Yang, “A parallelized algorithm for the preconditioned interval Newton method,” Proc. 5th SIAM Conf. on Parallel Processing, March, 1991.
• Qing Yang and L. N. Bhuyan, “Analysis of Packet-Switched Multiple-Bus Mult iprocessor Systems,” IEEE Transactions on Computers, Vol. 30, No. 3, March 1991, pp. 352-357.

1990 

• Q. Yang, G. Thangadurai and L. N. Bhuyan, “An adaptive cache coherence scheme for hierarchical shared-memory multiprocessors,” IEEE Symp. on Parallel Processing, Dec. 1990.
• Qing Yang and R. Ravi, “Design and analysis of multiple-bus arbiters with different priority schemes”, Proc. of PARBASE-90–Int. Conf. on Database, Parallel Architectures, and Their Applications, pp 238-247 March, 1990.
• Q. Yang, “On performance improvement of cache coherence protocols for hierarchical multiprocessors,” ISMM Int’l Conf. on Parallel and Distributed Computing, and Systems, Oct. 1990.
• Qing Yang, “Performance analysis of a cache coherent multiprocessor based on hierarchical buses”, Proc. of PARBASE-90–Int. Conf. on Database, Parallel Architectures, and Their Applications, pp 248-257 March, 1990.
• Qing Yang and L. N. Bhuyan, “Performance of Multiple-Bus Interconnections for Multiprocessors,” Journal of Parallel and Distributed Computing, 8. pp. 267-273 (1990).

1989 

• Qing Yang, L. N. Bhuyan and B. Liu, “Analysis and Comparison of Cache Cohe rence Protocols for a Packet-Switched Multiprocessor,” IEEE Transactions on Computers, Special Issue on Distributed Computer Systems, A ug. 1989, pp 1143-1153
• .L. N. Bhuyan, D. Ghosal, and Qing Yang, “Approximate Analysis of Single a nd Multiple-ring Networks,” IEEE Transactions on Computers, July 1989, pp 1027-1040.
• L. N. Bhuyan, Qing Yang and D. P. Agrawal, “Performance of Multiprocessor Interconnection Networks”, IEEE Computer, Feb. 1989.

1988 

• Q. Yang and L.N. Bhuyan, “A queueing network model for cache coherence protocol on asynchronous multiple-bus multiprocessors,” 88’Int,l Conf. on Parallel Processing, pp. 130-137, 1988.
• Qing Yang and S. G. Zaky, “Communication performance in multiple-bus systems”, IEEE Transactions on Computers, Vol. 32, No. 7, pp. 848-853, July 1988.

1987 

• Q. Yang, L.N. Bhuyan, and R. Pavaskar, “Performance analysis of packet switched multiple-bus multiprocessor systems,” Proceedings of Eighth Real-Time System Symposium, Dec. 1987, pp. 170-178.
• Q. Yang and L.N. Bhuyan, “Design and analysis of decentralized multiple-bus multiprocessor,” Proceedings of 87’Int’l Conf. on Parallel Processing, Aug. 1987, pp. 889-892.

1986 

• Q. Yang, D. Ghosal and L.N. Bhuyan, “Analysis of Multiple Token-ring and Multiple Slotted-ring Networks,” IEEE Proceedings Computer Networking Symposium, Washington D.C., Nov. 1986, pp 79-86.