• Professor
• Electrical, Computer and Biomedical Engineering
• 401.874.2996
• jclce@uri.edu
• Office Location: Fascitelli Center for Advanced Engineering 406
• Lab: High Performance Computing Laboratory (HPCL)

Patents

• Lo J-C, Chuen-Song C, Inventors; Rhode Island Board of Education, Assignee. Systems and Methods for On-Chip Power Management. US Patent 7902802. March 8, 2011
• Jenkins KA, Lo J-C, Song P, Xia T, Inventors; LinkedIn Corp., Assignee. Programmable Jitter Signal Generator. US Patent August 22, 2006
• Williams EL, Martin HL, Lo J-C, Inventors; US Secretary of Navy, Assignee. Check Bit Code Circuit for Simultaneous Single Bit Error Correction and Burst Error Detection. US Patent October 10, 1995

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