For a short bio, click here
Ph.D. University of Louisiana, Lafayette,1988
M.A. University of Toronto, 1985
B.Sc. Huazhong Univ. of Sci. and Tech. China, 1982
Assistant Professor, Dept. of ECE, URI , 1988
Associate Professor, Dept. of ECE, URI , 1993
Professor, Dept. of ECE, URI, 1997
Distinguished Engineering Professor, Dept of ECE, URI, 1998
An IEEE Fellow, professor Yang’s research interests include Computer Architectures, Memory Systems, I/O and Data Storage architectures, Computer networking, Cyber Security, Parallel and Distributed Computing (software and hardware), Embedded Computer Systems and Applications, Computer Applications in Biomedical Systems. He is the director of High Performance Computing Lab (HPCL).
Recent News and Media Coverage
- Playing Poker for Public Safety
- URI Chinese-American Community Steps Up to Protect Local First Responders
- From Innovation to Successful Company,
- Engineering Professor Qing Yang formed a company to commercialize several of his patents: VELOBIT, Inc.
- Engineering students win national championship in intelligent car competition
- Helping people improving their quality of life.
- Three Startups from URI including VeloBit are in Boston Business Journal.
Selected Publications
| ISCA | “ A Bus Authentication and Anti-probing Architecture Extending Hardware Trusted Computing Base off CPU Chip and Beyond,” The 2020 Annual International Symposium on Computer Architecture, (ISCA’2020). Z. Xu, T. Mauldin, Z. Yao, S. Pei, T. Wei, and Qing Yang |
| ISCA | “TRAP-Array: A Disk Array Architecture Providing Timely Recovery to Any Point-in -time” in The 33rd Annual International Symposium on Computer Architecture, Qing Yang, Weijun Xiao, and Jin Ren |
| ISCA | “DCD—Disk Caching Disk: A New Approach for Boosting I/O Performance,” The 23rd Annual International Symposium on Computer Architecture, Philadelphia PA (ISCA’96). Y. Hu and Qing Yang |
| ISCA | “Caching Address Tags: A technique to reduce chip area cost for on-chip caches,” The 22nd Annual International Symposium on Computer Architecture,Santa Margherita Ligure, Italy. H. Wang, T. Sun, and Qing Yang |
| ISCA | “A novel cache design for vector processing,” The 19th International Symposium on Computer Architecture, pp. 362-37 1. Gold Coast, Australia. Qing Yang and Liping W. Yang |
| HPCA | “I-CASH: Intelligently Coupled Array of SSD and HDD” in The 17th IEEE International Symposium on High Performance Computer Architecture, San Antonio, TX. Jin Ren and Qing Yang |
| HPCA | “RAPID-Cache — A Reliable and Inexpensive Write Cache for Disk I/O Systems”, in The 5th International Symposium on High Performance Computer Architecture (HPCA-5). Orlando, Florida. Y. Hu, Qing Yang, and T. Nightingale |
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Teaching
- Graduate Courses: Computer Network (ELE543), Computer Architecture (ELE548), Embedded Computer Systems and Applications (ELE547), Advanced Topics on Computer Architecture (ELE648), and Digital System Design (ELE545).
- Undergrad Courses: Computer Organization Lab (ELE408), Launching a technology startup (ELE403G), and Engineering Entrepreneurship (EGR325).